1. Field of Invention
This invention relates generally to an improved electrical contact and method therefore for semiconductor devices and, more particularly, to an improved electrical contact to the body region of a DMOS transistor and method therefore that provides a self-aligned electrical contact which is more effective and requires less space than prior art electrical contact techniques.
2. Description of the Prior Art
U.S. Pat. Nos. 4,376,286 and 4,748,103, together with an article on Insulated Gate Bipolar Transistors, IEDM Technical Digest, PP 813-815, 1988, are exemplary of various approaches to fabricating DMOS transistors. The cited references all describe different approaches to achieving electrical contact to the body region of a DMOS transistor. In all of these structures, there exists a parasitic bipolar transistor formed by the drain substrate region acting as a collector, the body region (which contains the MOS channel) acting as the base, and the source region acting as an emitter. Lateral body current flow may cause the emitter-base junction to be forward biased causing undesirable latch-back breakdown to occur. Usually, a deep body contact diffusion is employed to minimize the drop caused by the lateral body current flow. This deep body contact often require extra space on the die, or results in alignment problems, while its omission results in poor transient performance.
Thus a need existed to provide an improved process and structure for the fabrication of a DMOS transistor with good energy capability and a relatively simple process flow.